Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal oxide semiconductor field effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, charged-coupled devices (CCDs), solar cells, and digital micro-mirror devices (DMDs).
Semiconductor devices perform a wide range of functions such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual projections for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
Semiconductor devices exploit the electrical properties of semiconductor materials. The structure of semiconductor material allows the material's electrical conductivity to be manipulated by the application of an electric field or base current or through the process of doping. Doping introduces impurities into the semiconductor material to manipulate and control the conductivity of the semiconductor device.
A semiconductor device contains active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed operations and other useful functions.
Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing, and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each semiconductor die is typically identical and contains circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual semiconductor die from the finished wafer and packaging the die to provide structural support and environmental isolation. The term “semiconductor die” as used herein refers to both the singular and plural form of the words, and accordingly, can refer to both a single semiconductor device and multiple semiconductor devices.
One goal of semiconductor manufacturing is to produce smaller semiconductor devices. Smaller devices typically consume less power, have higher performance, and can be produced more efficiently. In addition, smaller semiconductor devices have a smaller footprint, which is desirable for smaller end products. A smaller semiconductor die size can be achieved by improvements in the front-end process resulting in semiconductor die with smaller, higher density active and passive components. Back-end processes may result in semiconductor device packages with a smaller footprint by improvements in electrical interconnection and packaging materials.
The demand for high performance, small size, high density of electronic devices has driven the development of 3D integration, in which different functional devices are integrated into one package. Through silicon via (TSV) technology offers high connectivity and minimal parasitic characteristics between chips when used in 3D integration. One step used in TSV formation involves revealing the TSV after covering the TSV with an insulating layer by using chemical mechanical peeling (CMP), for example, to remove insulating material. However, CMP is a high cost process due to a high cost of consumables. Other reveal techniques such as photolithography and etching are similarly high cost processes. Additional steps increase processing costs and time as well as limit the pitch of conductive vias. Revealing the TSV proves challenging using traditional techniques as via sizes shrink below 10 micrometers (μm) due to size limitations.
Current TSV processes cover the entire surface of the TSV wafer with insulating material, including the TSVs, and require an additional TSV exposure step. The exposure steps have limited resolution and precision. For example, if the insulating layer overlay performance is 2 μm and TSV size is 10 μm, the TSV critical dimension should be lower than 6 μm. Such small sizes are a challenge for current via reveal techniques such as CMP, photolithography, and etching. Also, reveal steps can cause resistance issue to micro bumps formed on top of TSVs as the critical dimension of the TSVs shrinks. After the required exposure steps, an insulating layer applied over the conductive TSVs limits the contact area and adhesion for forming electrical interconnect to the upper surface of the TSV. A weak adhesion between the bumps and conductive TSV reduces joint reliability.